Auckland University of Technology

AUT is the fastest growing and second largest university in New Zealand. We have been a university since 2000, but a place of learning for 120 years and operate in accordance with the Education Act (1989).

Staff in the High Performance Computing Research Lab (HPCRL) and the Institute for Radio Astronomy & Space Research (IRASR) at AUT contribute to the Central Signal Processor (CSP) and Science Data Processor (SDP) elements of the SKA.

AUT People

Peter Baillie

Project Manager, High Performance Computing Research Laboratory at AUT. Peter’s Project Management role spans across both CSP and SDP Consortia as well as being the Project Manager point of contact to SKA Office. Peter is Project Manager for Low Telescope and reports to Project Manager for CSP Consortium, based in Canada. He also liaises with SDP Resource Management Team for all NZA assigned tasks, outputs and reporting. Peter’s assigned FTE allocation, along with NZA FPGA Developers make-up a significant contribution to the CSIRO / ASTRON / AUT collaboration who is responsible for delivering the Low Correlator and Beamformer design and supporting Read more …

Andrew Ensor

Director NZ SKA Alliance, High Performance Computing Research Laboratory, AUT. Andrew is the Director of the New Zealand SKA Alliance, coordinating New Zealand’s significant involvement in the design of the SKA. He has been active in the SKA’s Central Signal Processor and in the Science Data Processor design since 2013. He is also the Director of the High Performance Computing Research Laboratory at AUT. For the SKA project, Andrew has: Developed efficient streaming data compression algorithms which helped form the start up company Nyriad. Lead the Survey correlator design team. Worked on optimising FFT algorithms across a range of hardware Read more …

Norbert Abel

Senior Research Engineer, High Performance Computing Research Laboratory, AUT. Norbert is an FPGA engineer, working full time on the SKA project, collaborating closely with ASTRON (Netherlands) and CSIRO (Australia) to develop the Low-frequency Correlator and Beamformer (Low.CBF). He completed his PhD at the University of Heidelberg, Germany, working as FPGA engineer for the new particle accelerator FAIR (Facility for Antiproton and Ion Research) in Darmstadt, Germany. His thesis “Design and Implementation of an Object-Oriented Framework for Dynamic Partial Reconfiguration” focussed on enabling the widespread use of Partial Reconfiguration by controlling it via a high-level language. After finishing his PhD, Norbert Read more …

Willem van Straten

Associate Professor, Institute for Radio Astronomy and Space Research, AUT. Willem is an astronomer with interests in pulsars and Fast Radio Bursts. He is currently a co-Chair of the SKA Science Working Group on Fundamental Physics with Pulsars, and as part of pre-construction he is leading the design of the pulsar timing engine (PST) of the SKA Central Signal Processor (CSP). He is a member of the International Pulsar Timing Array Steering Committee and the Australia-New Zealand SKA Coordination Committee (ANZSCC) Science Advisory Committee; he also co-authored two chapters in the SKA Science Book.  Dr van Straten is a Principal Read more …

David Wilson

David Wilson

Associate Professor, AUT.  Director Inverse Problem Ltd. David Wilson is an Associate Professor in Electrical Engineering at Auckland University of Technology. Prior to joining AUT he was on the faculty at Karlstad University in Sweden following a position at the Swiss Federal Institute of Technology (ETH) in Zürich, Switzerland. His main research interests are modelling, simulation and control of industrial processes. Currently he is a director of the research-based Industrial Information and Control Centre (I2C2) where he manages multi-faceted research projects for international clients such as PETRONAS in Malaysia, and large New Zealand companies such as Transpower and Fonterra. He Read more …

William Kamp

Senior Research Engineer, High Performance Computing Research Laboratory, AUT. William is an FPGA engineer in the HPCRL, working full time on the SKA project, collaborating closely with NRC (Canada) to develop the Mid-frequency Correlator and Beamformer (Mid.CBF), and with CSIRO (Australia) and ASTRON (Netherlands)to develop the Low.CBF, two of the sub elements of the Central Signal Processor (CSP). For the SKA project, he has developed: An efficient serial data interconnect that will operate across the >20,000 internal 26Gbps optical fibre links of the Mid.CBF. A network communication protocol called AXIoE (Advanced eXtensible Interconnect over Ethernet) designed  to extend the internal Read more …