Staff at the Albany Campus in Auckland contribute to the Central Signal Processor (CSP) element of the SKA.
Senior Lecturer in Computer Engineering, SEAT – Electronics, Info and Communication Systems in Massey University. Presently he is the Director of the Center for Research in Analog and VLSI microsystems dEsign (CRAVE) at MasseyUniversity. He received his Ph.D. in Electronics Engineering from the University of California Los Angeles (UCLA). He was a VLSI design engineer at Xerox Microelectronics Center in El Segundo, California, where he worked in the design of CMOS VLSI microprocessors for 3 years. He then moved to the Asia-Pacific region and served several institutions including Nanyang Technological University, Singapore, Curtin University of Technology, Western Australia and Universiti Sains Malaysia, Malaysia. At University Sains Malaysia he held the position of Associate Professor and was the coordinator of the Analog and VLSI research laboratory. He spent the Read more …
Junior Research Engineer, Center for Research in Analog and VLSI micro-system Design, Massey University. Vignesh is working full time as an FPGA Verification Engineer in the SKA project. He earned his Masters degree in the field of VLSI Design from SASTRA University, India. He served as an Assistant Professor for eight years, contributing more of his time for research and development in the fields of signal processing and ASIC/FPGA designs.